Commit Graph

4318 Commits

Author SHA1 Message Date
Adam Caldwell 8ccb4f856c
Enable AVX-VNNI 256-bit path for Q8_1 R8 dot product (#1455)
Ungate the VNNI path in mul_mat_q8_1_r8_q8_2 by changing the
guard from HAVE_FANCY_SIMD to HAVE_VNNI256. This block only uses
256-bit intrinsics so it is safe for AVX-VNNI (non-512) CPUs.

Co-authored-by: Adam Caldwell <accaldwell@users.noreply.github.com>
2026-03-18 09:18:02 +01:00
Kawrakow dea161f108
Update model support list in README 2026-03-18 07:34:37 +01:00
Kawrakow 56477c7a9e
Mistral 4 support (#1450)
* WIP: mistral4

* CPU FA

* CUDA FA 320, 256
2026-03-18 07:32:39 +01:00
Kawrakow f6ca2fa8c0
Qwen-3.5/Next tweaks (#1447)
* Allow using -rtr and -muge together

* Various Qwen-3.5 tweaks

* No need to make v, g, beta contiguous

* Adjust NEON delta-net to non-contiguous v, g, b

* Cleanup

---------

Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
2026-03-18 07:32:17 +01:00
Nexes the Elder 61fad8b094
Print timings in sweep-bench (#1454) 2026-03-18 06:57:00 +01:00
StrikeOner a399456c12
fix: propagate CPPHTTPLIB_OPENSSL_SUPPORT to cpp-httplib target when LLAMA_SERVER_SSL=ON (#1451)
Without this, libcpp-httplib.a is compiled without SSL support, causing
an undefined reference to httplib::SSLServer at link time even though
the OpenSSL libraries are present on the link line.

Fixes #1449

Co-authored-by: kerem seyhan <kerem.seyhan@codecut.de>
2026-03-17 16:39:11 +01:00
Kawrakow bd1e604d0c
Update AUTHORS t 2026-03-17 10:46:21 +01:00
Adam Caldwell 008125b5c1
Enable AVX-VNNI 256-bit path for Q4_K and Q5_K R4 matmul (#1446)
Add new CPU macro HAVE_VNNI256 for CPUs with 256-bit VNNI
(AVX-VNNI) support or better (AVX512-VNNI+VL), separate from
HAVE_FANCY_SIMD which requires the full AVX-512 set. Relax four
#ifdef guards in mul_mat_q4_k_r4_q8_k and mul_mat_q5_k_r4_q8_k
to use HAVE_VNNI256 instead of HAVE_FANCY_SIMD, enabling vpdpbusd
and cvtepi8_epi32 on Alder Lake, Raptor Lake, and similar CPUs.

Co-authored-by: Adam Caldwell <accaldwell@users.noreply.github.com>
2026-03-17 10:44:55 +01:00
Kawrakow 54bcafee16
Allow using -rtr and -muge together (#1444) 2026-03-16 18:26:26 +01:00
Kawrakow e3f5f3d823
Minor delta-net tweaks (#1429) 2026-03-16 13:59:55 +01:00
hksdpc255 fe92e30d1e
server : preserve anthropic thinking blocks in conversion (#1441) 2026-03-16 13:59:19 +01:00
Kawrakow 29e6d6b4c1
Check for overlap before fusing ssm_conv and silu (#1443) 2026-03-16 12:14:20 +01:00
Kawrakow 8075acb6cd
Turn off CPU ssm_conv and silu fusion (#1440) 2026-03-16 10:44:53 +01:00
hksdpc255 18a9b4c125
fix chat parser not been used in anthropic api (#1437) 2026-03-16 08:59:01 +01:00
hksdpc255 a655a95378
Prevent adding content that starts with 'x-anthropic-' to system_content. (#1436) 2026-03-16 08:57:09 +01:00
Kawrakow d83b0172b1
Attempt to fix #1438 (#1439) 2026-03-16 08:34:17 +01:00
Kawrakow 56f4e9e673
Fix the fix (#1433) 2026-03-15 17:33:10 +01:00
Kawrakow edf54621d2
Fix long max. context bottleneck (#1430) 2026-03-15 17:18:27 +01:00
Kawrakow 49778a6ce0
Update Docker documentation with important notice
Clarify the status of Docker support in ik_llama.cpp.
2026-03-15 12:35:04 +01:00
Kawrakow 10a8f5f8f1
Fix hybrid graph parallel + muge (#1426) 2026-03-14 18:15:09 +01:00
Kawrakow f8d95f1279
Fused SSM_CONV and SILU on ARM_NEON (#1425)
Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
2026-03-14 18:14:56 +01:00
mcm007 bfef07d10b
Update README.md and parameters.md with recent improvements (#1423)
* Improve text formatting

* Update README.md with recent models and features

* Update parameters.md with recent additions

* Remove deprecated from parameters.md
2026-03-14 18:14:20 +01:00
Kawrakow aa053205e8
Faster fused_rms_norm on the CPU (#1427) 2026-03-14 16:33:34 +01:00
dungquixote42 be2940f57a
Adaptive P sampler: update review logic, delete old code comments, put prep stage after logit bias (#1386)
* simpler n_rewind logic, delete old comments

* use more consistent names, add updt_w_cur to json schema

* align comments

* refactor review logic, update struct/variable names

* revert cosmetic changes

* check enable/disable in llama_prep_adaptive_p_impl()

* delete extra whitespaces after statement

* show target in debug prints

* more concise debug print

* delete old comments

* update with loop instead of move()

* comment out all adaptive p debug prints

* more debug prints

* move review() variables: common_sampler struct -> common_sampler_review() args

* match n_unsent type

* fix merge bugs, delete adaptive p references in buffer_and_check_string_ban()

* restore accidental erasure

* Revert "adaptive p: collect probability before logit bias"

This reverts commit 1434878461c49d1a2a9047fc15d5e7b78421fd2a.
2026-03-14 12:34:12 +01:00
mcm007 a6a1da9a28
Fix Issue 1382 (#1424)
* Use cuda 86 instead of default

"default" fails to build

* Update docker README.md

- Use 86 architecture
- Examples for mix of architectures
- Where to identify Cuda version
- Hint to clean unused images
- How to build without llama-swap
2026-03-14 12:27:29 +01:00
Kawrakow 46018f89ed
Fuse SILU and SSM_CONV (CPU) (#1421) 2026-03-14 08:27:32 +01:00
Kawrakow c2b8e95700
Be able to use imatrix computed with merged ffn_gate_up_exps (#1419)
* Be able to use imatrix computed with merged ffn_gate_up_exps

* Also the other way around
2026-03-13 17:57:56 +01:00
Kawrakow 633c1baa94
Enable imatrix calculation for models with fused ffn_up/gate_exps tensors (#1418) 2026-03-13 17:57:38 +01:00
Kawrakow 07ab0d263b
Add ffn_gate_up_exps to --cpu-moe and --n-cpu-moe overrides (#1422) 2026-03-13 17:56:08 +01:00
Kawrakow 9f4656fa7d
Faster top_n_sigma sampler (#1417)
* Faster top_n_sigma sampler

* This is better: 4000 t/s -> 8000 t/s
2026-03-13 10:53:45 +01:00
Kawrakow 7fab617684
Enable split mode graph for on-the-fly merged up/gate experts (#1413)
* Split mode graph for on-the-fly merged ffn_up/gate_exps

* Cleanup

* Also handle merged bias
2026-03-13 08:11:46 +01:00
hksdpc255 9b90fd37cb
Improve MiroThinker chat template compatibility with the new Jinja template engine (#1404)
* Improve compatibility with the new Jinja template engine

* Refactor MiroThinker chat template using macros

* Add MiroThinker-compat chat template

For compatibility reasons. It can be removed when upstream fix the jinja render engine bugs.

* Add workaround for llama.cpp crashing
2026-03-13 08:11:17 +01:00
firecoperana 433531ddae
server : support multi-modal context checkpoints and prompt caching (#1398)
* server : support multi-modal context checkpoints and prompt caching

do not create checkpoint right after image processing

improve mtmd check for slot ops

fix context shift

do not abort if template parse failed

* change to debug message when detecting ban token

---------

Co-authored-by: firecoperana <firecoperana>
2026-03-13 08:07:57 +01:00
Kawrakow d2141b802b
Update AUTHORS 2026-03-13 07:09:56 +01:00
SneedwareInc 525d8b8a40
Update server string+regex ban documentation (#1407)
* Update server string/regex ban documentation

* Update README.md

* Update README.md
2026-03-13 07:08:38 +01:00
Kawrakow 714329f4ca
Remove pre-merged up/gate notice from the README
No need for that after PRs #1408 and #1412
2026-03-12 17:29:36 +01:00
Kawrakow c85361fe2f
Split mode graph for models with pre-merged ffn_up/ffn_gate experts (#1412)
* WIP: support pre-merged up/gate experts

Haha, mainline has elected to arrange the merged tensors
the other way around compared to what I had done in the on-the-fly merge.

* Change the order of on-the-fly packed up/gate

* OpenAI

* CUDA TG

* CPU

* Split mode graph for models with pre-merged ffn_up/ffn_gate experts
2026-03-12 17:26:48 +01:00
Kawrakow 5713d3b38b
Support models with merged up/gate experts (#1408)
* WIP: support pre-merged up/gate experts

Haha, mainline has elected to arrange the merged tensors
the other way around compared to what I had done in the on-the-fly merge.

* Change the order of on-the-fly packed up/gate

* OpenAI

* CUDA TG

* CPU
2026-03-12 09:25:57 +01:00
Kawrakow afa6439ac3
Faster convolution on AVX2 (#1400)
* Faster ssm_conv on AVX2

* Move the optimized ssm_conv to iqk

* Minor
2026-03-11 19:28:38 +01:00
Kawrakow 1f4dcab5c6
Add abbility to merge up/gate expert tensors to Qwen3.5-MoE/Qwen3-Next (#1403) 2026-03-11 19:28:12 +01:00
saood06 2161ee01cb
Vibe coded script + constants from mainline + pip requirements (#1405) 2026-03-11 15:41:17 +01:00
Marcel Coetzee 4d09e04501
common : add env vars for cache_type_k/v, mlock, k_cache_hadamard and enable env vars for all tools (#1402)
Two changes:

1. Add four missing environment variable bindings to
   gpt_params_parse_from_env():

   - LLAMA_ARG_CACHE_TYPE_K  (string, e.g. "q8_0")
   - LLAMA_ARG_CACHE_TYPE_V  (string, e.g. "q8_0")
   - LLAMA_ARG_MLOCK         (bool, "1"/"true")
   - LLAMA_ARG_K_CACHE_HADAMARD (bool, "1"/"true")

2. Call gpt_params_parse_from_env() from gpt_params_parse() so that
   ALL tools (llama-cli, llama-bench, etc.) respect env vars, not
   just llama-server. Env vars act as defaults; CLI flags override.

Follows the existing get_env() pattern and uses the same
LLAMA_ARG_ prefix convention as the other env vars.

Co-authored-by: Pipboyguy <>
2026-03-11 15:35:26 +01:00
SneedwareInc 4a247593dc
Make string ban more robust and add regex ban (#1243)
* Test new ctx_sampling->n_rewind system

* CRLF quickfix

* Adaptive p check

* merge banned_n

* Fix attempt 1

* Fix attempt 2
2026-03-11 15:30:27 +01:00
Kawrakow fd4638f0e8
Update README with model compatibility warnings
Add warnings about incompatible models with merged ffn_up_exps and ffn_gate_exps tensors.
2026-03-11 12:06:45 +01:00
Kawrakow bb45cc3c74
Arghh (#1397) 2026-03-10 18:28:35 +01:00
Kawrakow cda15bf175
Discard very first compute graph for recurrent models (#1393) 2026-03-10 09:41:47 +01:00
Kawrakow f90b4c2f27
Full graph parallel for Qwen3.5 (dense and MoE) (#1388)
* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

Loads and starts running, crashes with illegal memory access in
quantize_mmq_q8_1. This almost always indicates NaNs in the input
to the MoE FFN part.

* WIP

* WIP

Loads and runs, wrong results (very high PPL)
Performance looks promising, around 25% better than previous sm graph.
Needs f32 or bf16 graph reduce type.

* WIP - still wrong

* Fix after rebase

* WIP

* WIP

* This seems to be working for dense Qwen3.5!!!

* WIP: Qwen3-Next is not quite working

* Some cleanup

* Disable Qwen3-Next for now

* Disable graph parallel when mmproj was specified

* Read/write split recurrent state

* That should not crash

* Re-enable vision - it works now

* Recurrent layers should now be counted for split cache
2026-03-10 09:08:24 +01:00
Kawrakow 14492bfdd2
Make split mode graph work with vision enabled (#1392) 2026-03-10 06:56:39 +01:00
Kawrakow 666ea0e983
Revise build instructions for ik_llama.cpp
Updated documentation to reflect changes from 'llama.cpp' to 'ik_llama.cpp' and clarified build instructions.
2026-03-09 11:23:39 +01:00
mullecofo f67fd9a452
Update README.md with build instructions for Windows (#1372)
* Fix compilation on clang-cl.exe

Fixes https://github.com/ikawrakow/ik_llama.cpp/issues/1169

See bitwise ariphmetics here: https://clang.llvm.org/doxygen/avx512fintrin_8h_source.html

Clang (and GCC) supports a language feature called Vector Extensions.

To Clang, `__m512i` is not just a "struct" or a "bag of bits"; it is recognized by the compiler as a native vector type.
Because it is a native vector type, Clang automatically maps standard C operators to the corresponding hardware instructions.
When you write `a | b`, Clang sees that a and b are 512-bit integer vectors.
It implicitly understands that the bitwise OR operator (|) applies to these vectors.
It automatically generates the VPORQ (or VPORD) instruction without needing any helper function.

MSVC follows a stricter, more traditional C++ model regarding intrinsics.

In MSVC, __m512i is defined in the header files (<immintrin.h>) as a struct or union (e.g., typedef struct __m512i { ... } __m512i). To the MSVC compiler, it is essentially a user-defined data type, not a fundamental language primitive like int or float.
Standard C++ does not define what `|` means for a user-defined struct.
MSVC does not have the same "Vector Extensions" that automatically apply operators to these structs.
When you write `a | b` in MSVC, the compiler looks for a definition of `operator|` for the __m512i struct. Since the standard headers don't provide one, the compiler throws an error.
You must use the explicit intrinsic function provided by Intel/MSVC: _mm512_or_si512(a, b).

To get the nice syntax `(a | b)` in MSVC, you have to manually "teach" the compiler what `|` means by defining the `operator|` overload yourself.

* Update README.md with build instructions for Windows

Current README lacks any guide for Windows users, whereas build process on that platform is quite compicated

* Update build.md with instruction about clang-cl.exe

Brings step-by-step build instruction for Windows

* Apply suggestions from code review

Co-authored-by: Kawrakow <iwankawrakow@gmail.com>

* Polish build.md for Windows usage

Added example of use for Windows

* Apply suggestions from code review

---------

Co-authored-by: Kawrakow <iwankawrakow@gmail.com>
2026-03-09 11:17:26 +01:00